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Computer Organization: Instruction Codes, Registers, Memory, I/O, Overview, Lecture notes of Architecture

An overview of computer organization, focusing on instruction codes, computer registers, timing and control, instruction cycles, memory reference instructions, input-output and interrupts, and a complete computer description. It covers the Central Processing Unit (CPU), memory unit, input-output devices, and Computer Organization as a realization of computer architecture.

What you will learn

  • What are the different types of instructions and how are they encoded?
  • How does the memory unit of a digital computer function?
  • How does the instruction cycle work in a digital computer?
  • What is the role of the Central Processing Unit (CPU) in a digital computer?
  • What are the functions of the Input-Output devices in a digital computer?

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DIGITAL NOTES
ON
COMPUTER ORGANIZATION & MICROPROCESSORS
(R20A1201)
B.TECH II YEAR I SEM
DEPARTMENT OF INFORMATION TECHNOLOGY
MALLA REDDY COLLEGE OF ENGINEERING & TECHNOLOGY
(Autonomous Institution UGC, Govt. of India)
(Affiliated to JNTUH, Hyderabad, Approved by AICTE - Accredited by NBA & NAAC ‘A’ Grade - ISO 9001:2015 Certified)
Maisammaguda, Dhulapally (Post Via. Hakimpet), Secunderabad 500100, Telangana State, INDIA.
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DIGITAL NOTES

ON

COMPUTER ORGANIZATION & MICROPROCESSORS

(R20A1201)

B.TECH II YEAR I SEM

DEPARTMENT OF INFORMATION TECHNOLOGY

MALLA REDDY COLLEGE OF ENGINEERING & TECHNOLOGY

(Autonomous Institution – UGC, Govt. of India)

(Affiliated to JNTUH, Hyderabad, Approved by AICTE - Accredited by NBA & NAAC – ‘A’ Grade - ISO 9001:2015 Certified)

Maisammaguda, Dhulapally (Post Via. Hakimpet), Secunderabad – 500100, Telangana State, INDIA.

MALLA REDDY COLLEGE OF ENGINEERING & TECHNOLOGY

DEPARTMENT OF INFORMATION TECHNOLOGY

B.TECH II YEAR I SEM

L/T/P/C

(R20A1201) COMPUTER ORGANIZATION & MICROPROCESSORS

COURSE OBJECTIVES:

Students should be able:

1. To understand basic components of computers and architecture of 8086microprocessor

2. To learn to classify the instruction formats and various addressing modes of

microprocessor.

3. To know how to represent the data and understand how computations are

performed at machine level.

4. To have knowledge of the memory organization and I/O Organization.

5. To understand the parallelism both in terms of single and multiple processors.

UNIT - I

Digital Computers : Introduction, Block diagram of Digital Computer, Definition of

ComputerOrganization, Computer Design and Computer Architecture.

Basic Computer Organization and Design : Instruction codes, Computer Registers,

Computerinstructions, Timing and Control, Instruction cycle, Memory Reference Instructions,

Input – Output and Interrupt, Complete Computer Description.

Micro Programmed Control : Control memory, Address sequencing, micro program

example, design of control unit.

UNIT - II

Central Processing Unit: The 8086 Processor Architecture, Register organization, Physical

memoryorganization,GeneralBusOperation,I/OAddressingCapability,SpecialProcessorActiviti

es,Minimum and Maximum mode system andtimings.

8086 Instruction Set and Assembler Directives - Machine language instruction formats,

Addressing modes, Instruction set of 8086, Assembler directives and operators.

UNIT - III

Assembly Language Programming with 8086 - Machine level programs, Machine coding

the programs, Programming with an assembler, Assembly Language example programs. Stack

structure of 8086, Interrupts and Interrupt service routines, Interrupt cycle of 8086, Interrupt

programming, Passing parameters to procedures, Macros, Timings and Delays.

UNIT- 1

Lecture Notes

Introduction: A Digital computer can be considered as a digital system that performs various computational

tasks.The first electronic digital computer was developed in the late 1940s and was used primarily for

numerical computations.By convention, the digital computers use the binary number system, which has two

digits: 0 and 1. A binary digit is called a bit.A computer system is subdivided into two functional entities:

Hardware and SoftwareThe hardware consists of all the electronic components and electromechanical devices that

comprise the physical entity of the device.The software of the computer consists of the instructions and data that

the computer manipulates to perform various data-processing tasks.

Digital Computers : Introduction, Block diagram of Digital Computer, Definition of ComputerOrganization,

Computer Design and Computer Architecture.

Basic Computer Organization and Design : Instruction codes, Computer Registers, Computer instructions,

Timing and Control, Instruction cycle, Memory Reference Instructions, Input – Output and Interrupt,

Complete Computer Description.

Micro Programmed Control : Control memory, Address sequencing, micro program example,

design of control unit.

 The Central Processing Unit (CPU) contains an arithmetic and logic unit for manipulating data, a number

of registers for storing data, and a control circuit for fetching and executing instructions.

 The memory unit of a digital computer contains storage for instructions and data.

 The Random Access Memory (RAM) for real-time processing of the data.

 The Input-Output devices for generating inputs from the user and displaying the final results to the user.

 The Input-Output devices connected to the computer include the keyboard, mouse, terminals, magnetic

disk drives, and other communication devices

Computer Organization :

Computer Organization is realization of what is specified by the computer architecture .It deals with how

operational attributes are linked together to meet the requirements specified by computer architecture. Some

organizational attributes are hardware details, control signals, peripherals.

EXAMPLE : Say you are in a company that manufactures cars, design and all low-level details of the car come

under computer architecture (abstract, programmers view), while making it’s parts piece by piece and connecting

together the different components of that car by keeping the basic design in mind comes under computer

organization (physical and visible).

In addition to the opcode, many instructions also contain one or more operands , which indicate where in

registers or memory the data required for the operation is located. For example, and add instruction requires two

operands, and a not instructionrequires one.

| Opcode | Operand | Operand|

The opcode and operands are most often encoded as unsigned binary numbers in order to minimize the number

of bits used to store them. For example, a 4-bit opcode encoded as a binary number could represent up to 16

different operations.

The control unit is responsible for decoding the opcode and operand bits in the instruction register, and then

generating the control signals necessary to drive allother hardware in the CPU to perform the sequence of

microoperations that comprise the instruction.

Basic Computer Instruction Format:

The Basic Computer has a 16 - bit instruction code similar to the examples describedabove. It supports direct

and indirect addressing modes.

How many bits are required to specify the addressing mode?

| I | OP | ADDRESS |

I = 0: direct

I = 1: indirect

Computer Instructions

All Basic Computer instruction codes are 16 bits wide. There are 3 instruction codeformats:

Memory-reference instructions take a single memory address as an operand, andhave the format:

| I | OP | Address |

If I = 0, the instruction uses direct addressing. If I = 1, addressing in indirect.How many memory-reference

instructions can exist?

Register-reference instructions operate solely on the AC register, and have the following format:

| 0 | 111 | OP |

How many register-reference instructions can exist? How many memory-reference instructions can coexist with

register-reference instructions?

Input/output instructions have the following format:15 14 12 11

Timing and Control

| 1 | 111 | OP |

All sequential circuits in the Basic Computer CPU are driven by a master clock, withthe exception of the INPR

register. At each clock pulse, the control unit sends control signals to control inputs of the bus, the registers, and

the ALU.

Control unit design and implementation can be done by two general methods:

 A hardwired control unit is designed from scratch using traditional digital logic design techniques to

produce a minimal, optimized circuit. In other words, the control unit is like an ASIC (application-

specific integrated circuit).

 A micro-programmed control unit is built from some sort of ROM. The desired control signals are

simply stored in the ROM, and retrieved in sequence to drive the micro operations needed by a

particular instruction.

Micro programmed control:

Micro programmed control is a control mechanism to generate control signals by using a memory called

control storage (CS), which contains the control signals. Although micro programmed control seems to

be advantageous to CISC machines, since CISC requires systematic development of sophisticated control

signals, there is no intrinsic difference between these 2 control mechanisms.

1. Fetch instruction

2. Decode

3. Fetch operand

4. Execute

Program execution can be represented as a top-down design:

1. Program execution

a. Instruction 1

i. Fetch instruction

ii. Decode

iii. Fetch operand

iv. Execute

b. Instruction 2

i. Fetch instruction

ii. Decode

iii. Fetch operand

iv. Execute

Instruction 3 ..

Program execution begins with:

PC ← address of first instruction, SC ← 0

After this, the SC is incremented at each clock cycle until an instruction is completed, and then it is cleared to

begin the next instruction. This process repeats until a HLT instruction is executed, or until the power is shut off.

Instruction Fetch and Decode:

The instruction fetch and decode phases are the same for all instructions, so the control

functions and micro operations will be independent of the instruction code.

Everything that

happens in this phase is driven entirely by timing variables T

0

, T

1

and T

2

. Hence, all control

inputs in the CPU during fetch and decode are functions of these

three variables alone.

T

0

: AR ← PC

T

1

: IR ← M[AR], PC ← PC + 1

T

2

: D

0 - 7

← decoded IR(12-14), AR ← IR(0-11), I ← IR(15)

For every timing cycle, we assume SC ← SC + 1 unless it is stated that SC ← 0.

The operation D 0 - 7

← decoded IR( 12 - 14) is not a register transfer like most of our micro operations, but is

actually an inevitable consequence of loading a value into the IR register. Since the IR outputs 12-14 are directly

connected to a decoder, the outputsof that decoder will change as soon as the new values of IR(12-14) propagate

through the decoder.

In hardware development, unlike serial software development, it is often advantageous to

perform work that may not be necessary. Since we can performmultiple micro operations at the same time,

we might was well do everything that might be useful at the earliest possible time. Likewise, loading AR

with the

address field from IR at T 2

is only useful if the instruction is a memory-reference instruction. We

won't know this until T 3

, but there is no reason to wait since there is no harm in loading AR immediately

Input-Output and Interrupt:

The Basic Computer I/O consists of a simple terminal with a keyboard and aprinter/monitor.

The keyboard is connected serially (1 data wire) to the INPR register. INPR is a shift register capable of shifting

in external data from the keyboard one bit at a time. INPR outputs are connected in parallel to the ALU.

Shift enable

v

| Keyboard |---/-->| INPR <|--- serial I/O clock

v v v

| ALU |

Micro Programmed Control:

Control Memory:

Control memory is a random access memory(RAM) consisting of addressable storage registers. It is

primarily used in mini and mainframe computers. It is used as a temporary storage for data. Access to control

memory data requires less time than to main memory; this speeds up CPU operation by reducing the number of

memory references for data storage and retrieval. Access is performed as part of a control section sequence

while the master clock oscillator is running. The control memory addresses are divided into two groups: a task

modeand an executive (interrupt) mode.

Addressing words stored in control memory is via the address select logic for each of the register

groups. There can be up to five register groups in control memory. These groups select a register for fetching

data for programmed CPU operation or for maintenance console or equivalent display or storage of data via

maintenance console or equivalent. During programmed CPU operations, these registers are accessed directly by

the CPU logic. Data routing circuits are used by control memory to interconnect the registers used in control

memory. Some of the registers contained in a control memory that operate in the task andthe executive modes

include the following: Accumulators Indexes Monitor clock status indicating registers Interrupt data

registers

  • The control unit in a digital computer initiates sequences of micro operations
    • The complexity of the digital system is derived form the number of sequences that are

performed

  • When the control signals are generated by hardware, it is hardwired
  • In a bus-oriented system, the control signals that specify micro operations are groups of bitsthat

select the paths in multiplexers, decoders, and ALUs.

  • The control unit initiates a series of sequential steps of micro operations
  • The control variables can be represented by a string of 1’s and 0’s called a control word
  • A micro programmed control unit is a control unit whose binary control variables are storedin memory
  • A sequence of microinstructions constitutes a micro program
  • The control memory can be a read-only memory
  • Dynamic microprogramming permits a micro program to be loaded and uses a writablecontrol memory
    • A computer with a micro programmed control unit will have two separate memories: amain memory and

a control memory

  • The micro program consists of microinstructions that specify various internal controlsignals for execution of

register micro operations

  • These microinstructions generate the micro operations to:

 fetch the instruction from main memory

 evaluate the effective address

 execute the operation

  • return control to the fetch phase for the next instruction
  • The control memory address register specifies the address of the microinstruction
  • The control data register holds the microinstruction read from memory
  • The microinstruction contains a control word that specifies one or more micro operations for the data processor
  • The location for the next micro instruction may, or may not be the next in sequence

Addressing Sequencing:

Each machine instruction is executed through the application of a sequence of microinstructions.

Clearly, we must be able to sequence these; the collection of microinstructions which implements a

particular machine instruction is called a routine.

The MCU typically determines the address of the first microinstruction which implements a machine

instruction based on that instruction's opcode. Upon machine power- up, the CAR should contain the

address of the first microinstruction to be executed.

The MCU must be able to execute microinstructions sequentially (e.g., within routines), but must also

SBR

used to hold return address for subroutine-call branch operations

Conditional branches are necessary in the micro program. We must be able to

perform some sequences of micro-ops only when certain situations or conditions exist (e.g., for

conditional branching at the machine instruction level); to implement these, we need to be able to

conditional execute or avoid certain microinstructions within routines.

Subroutine branches are helpful to have at the micro program level. Many routines contain

identical sequences of microinstructions; putting them into subroutines allows those routines to be

shorter, thus saving memory. Mapping of opcodes to microinstruction addresses can be done very

simply. When the CM is designed, a ``required'' length is determine for the machine instruction

routines (i.e., the length of the longest one). This is rounded up to the next power of 2, yielding a

value k such that 2 k microinstructions will be sufficient to implement any routine.

Alternately, the n - bit opcode value can be used as the ``address'' input of a 2n x M ROM; the contents of the

selected ``word'' in the ROM will be the desired M - bit CAR address for the beginning of the routine

implementing that instruction. (This technique allows for variable- length routines in the CM.) >pp We choose

between all the possible ways of generating CAR values by feeding them all into a multiplexor bank, and

implementing special branch logic which will determine how the muxes will pass on the next address to the

CAR

UNIT-II

Central Processing Unit

The 8086 Processor Architecture

8086 Microprocessor is divided into two functional units:

 EU (Execution Unit)

 BIU (Bus Interface Unit)

Execution Unit (EU):

 Execution unit gives instructions to BIU stating from where to fetch the data and then

decode and execute those instructions.

 Its function is to control operations on data using the instruction decoder & ALU. EU

has no direct connection with system buses as shown in the above figure,

 It performs operations over data through BIU.

The functional parts of 8086 microprocessors:

1. ALU: It handles all arithmetic and logical operations, like +, −, ×, /, OR, AND, NOT

operations.

2. Flag Register: It is a 16 - bit register that behaves like a flip-flop, i.e. it changes its

status according to the result stored in the accumulator.

4. Stack Pointer Register: It is a 16-bit register, which holds the address from the start

of the segment to the memory location, where a word was most recently stored on the

stack.

BIU (Bus Interface Unit)

BIU takes care of all data and addresses transfers on the buses for the EU like sending

addresses, fetching instructions from the memory, reading data from the ports and the

memory as well as writing data to the ports and the memory. EU has no direction connection

with System Buses so this is possible with the BIU. EU and BIU are connected with the

Internal Bus.

It has the following functional parts −

 Instruction queue − BIU contains the instruction queue. BIU gets upto 6 bytes of

next instructions and stores them in the instruction queue. When EU executes

instructions and is ready for its next instruction, then it simply reads the instruction

from this instruction queue resulting in increased execution speed.

 Fetching the next instruction while the current instruction executes is

called pipelining.

 Segment register − BIU has 4 segment buses, i.e. CS, DS, SS& ES. It holds the

addresses of instructions and data in memory, which are used by the processor to

access memory locations. It also contains 1 pointer register IP, which holds the

address of the next instruction to executed by the EU.

o CS − It stands for Code Segment. It is used for addressing a memory location

in the code segment of the memory, where the executable program is stored.

o DS − It stands for Data Segment. It consists of data used by the program andis

accessed in the data segment by an offset address or the content of other

register that holds the offset address.

o SS − It stands for Stack Segment. It handles memory to store data and

addresses during execution.

o ES − It stands for Extra Segment. ES is additional data segment, which is

used by the string to hold the extra destination data.

 Instruction pointer − It is a 16-bit register used to hold the address of the next

instruction to be executed.

Register Organization :

A register is a very small amount of fast memory that is built in the CPU (or Processor) in

order to speed up the operation. Register is very fast and efficient than the other memories

like RAM, ROM, external memory etc. For which the registers occupied the top position in

the memory hierarchy model.

The 8086 microprocessor has a total of fourteen registers that are accessible to the

programmer. All these registers are 16-bit in size. The registers of 8086 are categorized into 5

different groups:

a) General Registers

b) Index Registers

c) Segment Registers

d) Pointer Registers

e) Status Registers

General Registers:

All general registers of the 8086 microprocessor can be used for arithmetic and logic

operations. These all general registers can be used as either 8-bit or 16-bit registers. The

general registers are:

a) AX (Accumulator): AX is used as 16-bit accumulator. The lower 8-bits of AX are

designated to use as AL and higher 8 - bits as AH. AL can be used as an 8 - bit

accumulator for 8-bit operation. This Accumulator used in arithmetic, logic and data

transfer operations. For manipulation and division operations, one of the numbers

must be placed in AX or AL.

b) BX (Base Register): BX is a 16 bit register, but BL indicates the lower 8-bits of BX

and BH indicates the higher 8-bits of BX. The register BX is used as address register

to form physical address in case of certain addressing modes (ex: indexed and register

indirect).

c) CX (Count Register): The register CX is used default counter in case of string and

loop instructions. Count register can also be used as a counter in string manipulation

and shift/rotate instruction.